Foreign media: Domestic Chinese chip design software companies are actively responding to Huawei's newly proposed next-generation chip architecture roadmap, but analysts caution that breaking the market monopoly held by U.S. firms in this field remains a significant challenge for Chinese vendors.
Domestic leading EDA (Electronic Design Automation) company Xinhua Zhang recently unveiled an advanced 3D Integrated Circuit (3D IC) physical verification platform named "Argus," integrating it into its suite of tools and explicitly positioning it as a key technological enabler for Huawei's "Tau Scaling Law."
Just one day after Huawei officially launched its Tau Scaling Framework at the end of last month, a research team from Peking University announced the development of a prototype EDA tool compatible with Huawei's LogicFolding architecture—dubbed a "true 3D" solution—widely regarded as a critical technical milestone.
Huawei’s Tau Scaling Law is positioned as an alternative to Moore’s Law. Its core logic involves vertically stacking circuits originally arranged in a planar layout using "LogicFolding" technology to compress signal transmission latency. This approach aims to catch up with top-tier chip transistor density and performance without relying on Western advanced lithography equipment restricted by export controls. According to reports, Huawei's goal is to achieve mass production of chips equivalent to a 1.4-nanometer process by 2031.
Analysts believe these strategic moves present new market opportunities for domestic EDA firms; however, significant gaps remain between local enterprises and their U.S. counterparts in full-scale competition.
Original source: toutiao.com/article/1867808568061964/
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